In a typical system for digital signal processing, a division circuit has been used for carrying out digital data processing, such as a signal standization, signal operation. Therefore, some division circuits or systems have been proposed. For example, Japanese document: "Digital Technology Series No. 3, pp. 30 to 34; Digital Signal Processing System" published by Tokai University Publishing Society on Oct. 25, 1986, discloses a divider according to an improved non-restoring division method for a use of digital signal processing system. The divider, however, requires a large-scale and complicated hardwares for carrying out the division.
Referring now to FIGS. 1 to 3, some conventional division circuits will be briefly described. FIG. 1 shows a first example of the division circuit. In FIG. 1, the division circuit comprises a divider 10 and a divisor ROM (Read Only Memory) 11. A dividend x is applied to the divider 10 through a dividend input terminal 12. A divisor A is applied to the divisor ROM 11 through a divisor input terminal 13. The divisor ROM 11 stores practical data for divisors A therein. Thus, the divisor ROM 11 applies a suitable data of the divisor A to the divider 10. Then, the divider 10 outputs a quotient y (y=x/A) The quotient y is obtained through a quotient output terminal 14. The divisor ROM 11 can make the processing of the division in the divider 10 easy.
Generally, the divisor ROM 11 is designed for the exclusive use of the division circuit. Practical data of the divisors A are stored in the divisor ROM 11. Therefore, the division circuit as shown in FIG. 1 has a simple construction. Practical designs for the division can accomplished by simply writing data in the divisor ROM 11. The design of the division also can be made in a relatively short time of period. Therefore, the division circuits as shown in FIG. 1 are used in the discrete type apparatus.
The division circuit as shown in FIG. 1, however, requires a relatively large-scale memory capacity for the divisor ROM 11. For example, it is assumed that both the dividend x and the divisor A are 8 bit data. Then the divisor ROM 11 must have a memory capacity of 2.sup.(8+8) bits or 524 K.bits.
FIG. 2 shows a second example of the conventional division circuit. In FIG. 2, the division circuit comprises a multiplier 15 and a multiplier ROM 16. A dividend x for the division circuit is applied to the multiplier 12 through a dividend input terminal 12 as a multiplicand x. A divisor A for the division circuit is applied to the multiplier ROM 13 through an divisor input terminal 13. The multiplier ROM 16 stores practical data of reciprocals 1/A corresponding to the divisors A. Thus, the multiplier ROM 16 applies a suitable data of the reciprocals 1/A to the multiplier 15 as a multiplier 1/A. Then, the multiplier 15 outputs a product y (y=x.multidot.(1/A)). The product y is output through a quotient output terminal 14 of the division circuit as a quotient y (y=x/A) between the dividend x and the divisor A.
The division circuit as shown in FIG. 2 requires a memory capacity for the multiplier ROM 16 less than the divisor ROM 11, as shown in FIG. 1. It is assumed that both the dividend x and the divisor A are 8 bit data, in similar to the case of FIG. 1. Then the multiplier ROM 16 must have a memory capacity of 2.sup.8 .times.8 bits or 2 K.bits.
FIG. 3 shows a third example of the conventional division circuit. In FIG. 3, the division circuit comprises a pair of logarithm ROMs 17 and 18, a subtractor 19 and an exponential ROM 20. A dividend x is applied to the first logarithm ROM 17 through a dividend input terminal 12. A divisor A is applied to the second logarithm ROM 18 through a divisor input terminal 13. The logarithm ROMs 17 and 18 store practical data of logarithms, Log x and Log A corresponding to the dividend x and the divisor A, respectively. Thus, the logarithm ROMs 17 and 18 apply suitable da&a of the logarithms, Log x and Log A to the subtractor 19.
The subtractor 19 carries out the subtraction of the Log A from the Log x. Thus, the subtractor 19 outputs a difference Y (Y=Log x-Log A=Log (x/A)). The difference Y (=Log (x/A)) is applied to the exponential ROM 20.
The exponential ROM 20 stores some practical data of exponential of the difference Y, i.e., Exp Y. Thus, the exponential ROM 20 outputs the exponential, Exp Y. That is, the exponential ROM 20 carries out an exponential calculation which is the reverse operation of the logarithm operation in the logarithm ROMs 17 and 18. The operation output y of the exponential ROM 20. i.e.. the exponential, Exp Y is output from a quotient output terminal 14 of the division circuit.
The exponential operation carried out in the exponential ROM 20 is the reverse operation of the logarithm operations carried out in the logarithm ROMs 17 and 18, as described above. Thus, the output y of the exponential ROM 20 becomes the quotient (x/A) between the dividend x and the divisor A.
In the division circuit as shown in FIG. 3, each of the logarithm ROMs 17 and 18 and the exponential ROM 20 requires a memory capacity of 2.sup.8 .times.8 bits or 2 K.bits. The division circuit of FIG. 3 thus requires 2.sup.8 .times.8.times.3 bits or 6 K.bits, in total.
As described above, the conventional division circuits is constituted by using ROMs. The ROMs, however, require a large scale of memory capacity for storing data necessary to carry out the division. Thus, the conventional division circuits has a drawback in the circuit size.